1. Field of the Invention
This invention relates to a poly-silicon display device, and more particularly to a thin film transistor substrate of a poly-silicon liquid crystal display and a simplified method of fabricating the same.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) device, which includes a plurality of liquid crystal cells in a matrix configuration in a liquid crystal display panel, displays images by controlling the transmittance of light in accordance with video signals. In each liquid crystal cell, a thin film transistor (TFT) is used as a switching device to independently supply a video signal. An active layer of such a TFT is generally formed of either amorphous silicon or polycrystalline silicon (poly-silicon). Because the carrier mobility of poly-silicon is approximately hundred times faster than the carrier mobility of amorphous silicon, high-speed driving circuits can be integrally formed in the LCD panel with the poly-silicon technology.
FIG. 1 is a schematic view illustrating a TFT substrate of a poly-silicon liquid crystal display panel integrated with driving circuits according to the related art.
Referring to FIG. 1, the TFT substrate includes a display area 7 provided with a TFT 30 and a pixel electrode 22 in each pixel area defined by the crossings of gate lines 2 and data lines 4, a data driver 5 for driving the data lines 4, and a gate driver 3 for driving the gate lines 2.
The TFT 30 charges a video signal from the data line 4 into the pixel electrode 22 in response to a scanning signal from the gate line 2. The pixel electrode 22 charged with the video signal generates a potential difference with respect to a common electrode of a color filter substrate which faces the TFT substrate with liquid crystal therebetween. This potential difference rotates the molecules of the liquid crystal due to the dielectric anisotropy of the liquid crystal. The transmittance of light varies depending on an amount of rotation of the liquid crystal molecules, thereby implementing gray-scale levels.
The gate driver 3 sequentially drives the gate lines 2, and the data driver 5 applies video signals to the data lines 4 when one of the gate lines 2 is driven.
FIG. 2 is an enlarged plan view of one pixel area included in the display area 7 of the TFT substrate illustrate in FIG. 1, and FIG. 3 is a cross-sectional view of the pixel area of the TFT substrate taken along the line I-I′ in FIG. 2.
Referring to FIGS. 2 and 3, the TFT substrate includes the thin film transistor (TFT) 30 connected to the gate line 2 and the data line 4, and the pixel electrode 22 connected to the TFT 30. Although either an NMOS-TFT or PMOS-TFT can be used for the TFT 30, the TFT 30 employing an NMOS-TFT will now be described.
The TFT 30 has a gate electrode 6 connected to the gate line 2, a source electrode connected to the data line 4, and a drain electrode 10 connected to the pixel electrode 22 via a pixel contact hole 20 passing through a protective film 18. The gate electrode 6 overlaps a channel area 14C of an active layer 14 provided on a buffer film 12 with a gate insulating film 16 therebetween. The source electrode and the drain electrode 10 are formed in such a manner to be insulated from the gate electrode 6 with an interlayer insulating film 26 therebetween. Further, the source electrode and the drain electrode 10 are connected to a source area 14S and a drain area 14D of the active layer 14 doped with an n+ impurity, respectively, via a source contact hole 24S and a drain contact hole 24D passing through the interlayer insulating film 26 and the gate insulating film 16.
According to the related art, forming the display area 7 of the TFT substrate requires a six-mask process, which will now be described in detail.
The buffer film 12 is formed on a lower substrate 1 and then the active layer 14 is formed on the buffer film 12 by a first mask process. The active layer 14 is formed by depositing an amorphous silicon layer on the buffer film 12 and then crystallizing it into a poly-silicon layer using a laser, and thereafter by patterning it with photolithography and etching processes using a first mask.
The gate insulating film 16 is formed on the buffer film 12 provided with the active layer 14 and then the gate line 2 and the gate electrode 6 are formed thereon by a second mask process. Further, an n+ impurity is doped into a non-overlapping area of the active layer 14 using the gate electrode 6 as a mask, thereby forming the source area 14S and the drain area 14D of the active layer 14.
The interlayer insulating film 26 is formed on the gate insulating film 16 provided with the gate line 2 and the gate electrode 6, and then source and drain contact holes 24S and 24D passing through the interlayer insulating film 26 and the gate insulating film 16 are formed by a third mask process.
The data line 4 including the source electrode and the drain electrode 10 is formed on the interlayer insulating film 26 by a fourth mask process.
The protective film 18 is formed on the interlayer insulating film 26 provided with the data line 4 and the drain electrode 10, and then the pixel contact hole 20 passing through the protective film 18 is formed by a fifth mask process to expose the drain electrode 10.
The transparent pixel electrode 22 connected to the drain electrode 10 via the pixel contact hole 20 is formed on the protective film 18 by a sixth mask process.
As described above, the display area 7 of the TFT substrate is formed by a six-mask process according to the related art. Because each mask process includes many sub-processes such as deposition, cleaning, photolithography, etching, photo-resist stripping and inspection, etc., the manufacturing process is complicated and the manufacturing cost is high. Furthermore, when the gate driver 3 and the data driver 5 are integrally formed with the display area 7 with the CMOS-TFT technology, a nine-mask process is generally required, thereby further complicating the manufacturing process.